[Intel-gfx] [PATCH] drm/i915:: Disable FBC on SandyBridge
Daniel Vetter
daniel at ffwll.ch
Tue Jan 17 11:57:05 CET 2012
On Tue, Nov 08, 2011 at 11:17:34PM +0000, Chris Wilson wrote:
> Enabling FBC is causing the BLT ring to run between 10-100x slower than
> normal and frequently lockup. The interim solution is disable FBC once
> more until we know why.
>
> Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>
Iirc fbc isn't really worth it power-wise on snb and we don't implement it on
ivb. So shouldn't we just disable it completely? Eugeni, any opinions - I
think you're most up to speed on power saving figures for snb?
-Daniel
> ---
> drivers/gpu/drm/i915/intel_display.c | 2 +-
> 1 files changed, 1 insertions(+), 1 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index 9fa342e..f972a09 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -1864,7 +1864,7 @@ static void intel_update_fbc(struct drm_device *dev)
> if (enable_fbc < 0) {
> DRM_DEBUG_KMS("fbc set to per-chip default\n");
> enable_fbc = 1;
> - if (INTEL_INFO(dev)->gen <= 5)
> + if (INTEL_INFO(dev)->gen <= 6)
> enable_fbc = 0;
> }
> if (!enable_fbc) {
> --
> 1.7.7.2
>
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--
Daniel Vetter
Mail: daniel at ffwll.ch
Mobile: +41 (0)79 365 57 48
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