[Intel-gfx] [PATCH-v2 0/3] drm/i915: interlaced mode support

Peter Ross pross at xvid.org
Fri Jan 20 12:24:03 CET 2012

On Wed, Jan 18, 2012 at 12:55:15PM -0800, Jesse Barnes wrote:
> On Wed, 18 Jan 2012 18:39:40 -0200
> Paulo Zanoni <przanoni at gmail.com> wrote:
> > Hi
> > 
> > 2012/1/18 Peter Ross <pross at xvid.org>:
> > > This patch set enables enables interlaced mode output on
> > > generation 3 and above chipsets.
> > 
> > I just tested that on HDMI.
> > 
> > The "interlace_allowed=1" patch seems fine: it made xrandr list more
> > modes. But I believe patch 1 is still not correct. I tested that and
> > instead of getting a 1920x1080 I got a 1920x1078 mode: vtotal, vblank
> > and vsync were wrong. If you look at the patch, you'll see that the
> > code has some "something -= 1" statements. I believe they could be
> > wrong.
> > 
> > So I removed these lines and tested again... Now the mode is actually
> > 1920x1080, but my monitor's OSD displays it as "1080p". So I also
> > tested my TV and it reported "1080p at 25hz" too.
> > 
> > I guess we're still missing something... I'll try to debug.

Yep. I can confirm this problem too. With PATCH-v2, the output height
is reduced by two lines. (I used a test bitmap to count the lines on CRT)

> Yeah for the interlaced case the -1 should be after the multiply, if
> it's there at all...  would have to double check the docs.

The docs do suggest the timings need to be subtracted by one line.
Performing the -1 after the *2 fixes the problem, and this has been tested
on gen 3 and 4 chipsets.

When the -1 is removed altogether, the output is the visually identical
to when the -1 is present. I'm erring on the side of keeping the -1,
since that makes the implementation consistent with the documentation.

-- Peter
(A907 E02F A6E5 0CD2 34CD 20D2 6760 79C5 AC40 DD6B)
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