[Intel-gfx] [PATCH] drm/i915: fixup interlaced bits clearing in PIPECONF on PCH_SPLIT
daniel at ffwll.ch
Sat Jan 28 12:07:55 CET 2012
On Thu, Jan 26, 2012 at 08:42:50PM +0100, Daniel Vetter wrote:
> An identical patch has been merged for i9xx_crtc_mode_set:
> ommit 59df7b1771c150163e522f33c638096ab0efbf42
> Author: Christian Schmidt <schmidt at digadd.de>
> Date: Mon Dec 19 20:03:33 2011 +0100
> drm/intel: Fix initialization if startup happens in interlaced mode [v2]
> But that one neglected to fix up the ironlake+ path.
> This should fix the issue reported by Alfonso Fiore where booting with
> only a HDMI cable connected to his TV failed to display anything. The
> issue is that the bios set up things for 1080i and used the pannel
> fitter to scale up the lower progressive resolutions. We failed to
> clear the interlace bit in the PIPEACONF register, resulting in havoc.
> v2: Be more paranoid and just unconditionally clear the field before
> setting new values.
> Cc: Peter Ross <pross at xvid.org>
> Cc: Alfonso Fiore <alfonso.fiore at gmail.com>
> Signed-Off-by: Daniel Vetter <daniel.vetter at ffwll.ch>
Alfonso reported back that this does indeed fix up his "black screen on
boot" issues when the bios sets up the hdmi connector with an interlaced
mode. Can you pick this patch up for -fixes if it musters your review?
Tested-by: Alfonso Fiore <alfonso.fiore at gmail.com>
Mail: daniel at ffwll.ch
Mobile: +41 (0)79 365 57 48
More information about the Intel-gfx