[Intel-gfx] [PATCH 04/10] drm/i915: add RPS configuration for Haswell

[Eugeni Dodonov]

On 07/02/2012 02:49 PM, Ben Widawsky wrote:
> On Mon,  2 Jul 2012 11:51:05 -0300
> Eugeni Dodonov <eugeni.dodonov at intel.com> wrote:
> 
>> Most of the RPS and RC6 enabling functionality is similar to what we had
>> on Gen6/Gen7, so we preserve most of the registers.
>>
>> Note that Haswell only has RC6, so account for that as well. As suggested
>> by Daniel Vetter, to reduce the amount of changes in the patch, we still
>> write the RC6p/RC6pp thresholds, but those are ignored on Haswell.
>>
>> Signed-off-by: Eugeni Dodonov <eugeni.dodonov at intel.com>
> Reviewed-by: Ben Widawsky <ben at bwidawsk.net>

Daniel, to please Ben Widawsky, you could add an extra paragraph in my
message, saying:

'On Haswell, the suggested values for the RP UP and RP DOWN interrupts
have changed in a way to have lower thresholds for all the operations.
However, the suggested values for pre-Haswell machines stay the same. In
order to follow what the hardware designers suggest, we program those as
suggested for each generation now.

Also, Haswell introduces a new scheduling bit for the RP DOWN
scheduling, which we now use by default'.

Eugeni