[Intel-gfx] [PATCH 12/81] drm/i915: create VLV_DSIPLAY_BASE #define

[Daniel Vetter]

On Wed, Jul 11, 2012 at 04:27:55PM +0200, Daniel Vetter wrote:
> Will be used more in the next patch.
> 
> Signed-off-by: Daniel Vetter <daniel.vetter at ffwll.ch>

Jesse's not around to ack this and Paulo punted. So I've just merged this.
-Daniel

> ---
>  drivers/gpu/drm/i915/i915_drv.c |    2 +-
>  drivers/gpu/drm/i915/i915_reg.h |    2 ++
>  2 files changed, 3 insertions(+), 1 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
> index e754cdf..116670e 100644
> --- a/drivers/gpu/drm/i915/i915_drv.c
> +++ b/drivers/gpu/drm/i915/i915_drv.c
> @@ -1032,7 +1032,7 @@ static bool IS_DISPLAYREG(u32 reg)
>  	 * This should make it easier to transition modules over to the
>  	 * new register block scheme, since we can do it incrementally.
>  	 */
> -	if (reg >= 0x180000)
> +	if (reg >= VLV_DISPLAY_BASE)
>  		return false;
>  
>  	if (reg >= RENDER_RING_BASE &&
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index cc82871..e982900 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -528,6 +528,8 @@
>  #define   GFX_PSMI_GRANULARITY		(1<<10)
>  #define   GFX_PPGTT_ENABLE		(1<<9)
>  
> +#define VLV_DISPLAY_BASE 0x180000
> +
>  #define SCPD0		0x0209c /* 915+ only */
>  #define IER		0x020a0
>  #define IIR		0x020a4
> -- 
> 1.7.7.6
> 

-- 
Daniel Vetter
Mail: daniel at ffwll.ch
Mobile: +41 (0)79 365 57 48