[Intel-gfx] [PATCH 2/2] drm/i915: disable indirect state pointers in render flush

[Daniel Vetter]

Since we don't guarantee that objects stay at the same gtt offset,
userspace needs to reload all indirect state anyway, even with hw
contexts. The hw provides a little pipe_control flag to disable at
least some these indirect state pointers and hence avoid to
save/restore them at context switch time.

Seems to improve hw context switch throughput as measured by running
glxgears by about 0.5%, barely above the noise on my ivb gt2 here.

Signed-Off-by: Daniel Vetter <daniel.vetter at ffwll.ch>
---
 drivers/gpu/drm/i915/intel_ringbuffer.c |    1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
index f52778f..bc95142 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -228,6 +228,7 @@ gen6_render_ring_flush(struct intel_ring_buffer *ring,
 	flags |= PIPE_CONTROL_VF_CACHE_INVALIDATE;
 	flags |= PIPE_CONTROL_CONST_CACHE_INVALIDATE;
 	flags |= PIPE_CONTROL_STATE_CACHE_INVALIDATE;
+	flags |= PIPE_CONTROL_INDIRECT_STATE_DISABLE;
 	if (IS_GEN7(ring->dev))
 		flags |= PIPE_CONTROL_DC_CACHE_FLUSH;
 	/*
-- 
1.7.10.4