[Intel-gfx] drm/i915: Disable DDI Pipe Control on HSW while disabling pipe

[Daniel Vetter]

On Fri, Jun 08, 2012 at 11:44:23AM +0530, Shobhit Kumar wrote:
> In Haswell while disabling a pipe, we need to disable the DDI control as
> well along with the PIPECONF. Otherwise we will hit assertions during crtc
> disable

Hm, can you add such an example assert with backtrace please? All these
asserts encode our current understanding of the hw depency chain, so I'd
like to check whether we're really doing the right thing and don't just
stfu some dmesg noise.

Thanks, Daniel

> 
> Signed-off-by: Shobhit Kumar <shobhit.kumar at intel.com>
> ---
>  drivers/gpu/drm/i915/intel_display.c |    7 +++++++
>  1 files changed, 7 insertions(+), 0 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index 0161d94..c69671d 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -1645,6 +1645,13 @@ static void intel_disable_pipe(struct drm_i915_private *dev_priv,
>  
>  	I915_WRITE(reg, val & ~PIPECONF_ENABLE);
>  	intel_wait_for_pipe_off(dev_priv->dev, pipe);
> +
> +	/* On HSW DDI Pipe control has to be disabled as well */
> +	if (IS_HASWELL(dev_priv->dev)) {
> +		val = I915_READ(DDI_FUNC_CTL(pipe));
> +		val = val  & (~PIPE_DDI_FUNC_ENABLE);
> +		I915_WRITE(DDI_FUNC_CTL(pipe), val);
> +	}
>  }
>  
>  /*
> -- 
> 1.7.7.6
> 
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-- 
Daniel Vetter
Mail: daniel at ffwll.ch
Mobile: +41 (0)79 365 57 48