[Intel-gfx] [PATCH 2/4] drm/i915: clear up backlight #define confusion on gen4+

[Eugeni Dodonov]

On 06/05/2012 05:07 AM, Daniel Vetter wrote:
> - Regroup definitions for BLC_PWM_CTL so that they're all together and
>   and ordered according to the bitfields.
> 
> - Add all missing defintions for BLC_PWM_CTL2.

s/defintions/definitions

> 
> - Use the BLM_ (for backlight modulation) prefix consistently.
> 
> - Note that combination mode (i.e. also taking the legacy backlight
>   control value from pci config space into account) is gen4 only.
> 
> - Move the new registers for PCH-split machines up, they're an almost
>   match for the gen4 defitions.  Prefix the special PCH-only bits with
>   BLM_PCH_. Also add the pipe C select bit for ivb.
> 
> - Rip out the second pair of PCH polarity definitions - they're only
>   valid on early (pre-production) ilk silicon.
> 
> - Adapt the existing code to use the new definitions. This has the
>   nice benefit of killing a magic (1 << 30) left behind be Jesse
>   Barnes.
> 
> No functional changes in this patch.
> 
> Signed-off-by: Daniel Vetter <daniel.vetter at ffwll.ch>

The bits look correct, but I think it would make it easier to follow up
if you'd split it into 2 patches to simplify things:
1. Add/regroup BLC_PWM_CTL2 and BLC_PWM_CTL stuff (and all the other
pre-PCH stuff)
2. Add/move the PCH registers

So each patch would correspond to one set of documents.

But if you think that the current way is good the way it is, for the
functional changes, as far as I can see:

Reviewed-by: Eugeni Dodonov <eugeni.dodonov at intel.com>

Eugeni