[Intel-gfx] [PATCH] Revert "drm/i915/dp: Use auxch precharge value of 5 everywhere"

[Daniel Vetter]

This reverts commit 092945e11c5b84f66dd08f0b87fb729715d377bc.

This commit prevents a DP screen from properly training the link.
Oddly enough it works, once the machine has been warm-boot with an
older kernel.

According to DP docs this _should_ have been the right precharge time.
Also, the commit that originally introduce this was just general snb
DP enabling and didn't mention any specific reason for this special
value. Whatever, trust the reporter that this makes things worse.

Cc: Adam Jackson <ajax at redhat.com>
Cc: Jesse Barnes <jbarnes at virtuousgeek.org>
Reported-by: "Wouter M. Koolen" <W.M.Koolen-Wijkstra at cwi.nl>
Buglink: https://lkml.org/lkml/2012/6/14/301
Signed-Off-by: Daniel Vetter <daniel.vetter at ffwll.ch>
---
 drivers/gpu/drm/i915/intel_dp.c |    7 ++++++-
 1 file changed, 6 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index c574ff0..a4b3887 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -371,7 +371,7 @@ intel_dp_aux_ch(struct intel_dp *intel_dp,
 	int recv_bytes;
 	uint32_t status;
 	uint32_t aux_clock_divider;
-	int try, precharge = 5;
+	int try, precharge;
 
 	intel_dp_check_edp(intel_dp);
 	/* The clock divider is based off the hrawclk,
@@ -391,6 +391,11 @@ intel_dp_aux_ch(struct intel_dp *intel_dp,
 	else
 		aux_clock_divider = intel_hrawclk(dev) / 2;
 
+	if (IS_GEN6(dev))
+		precharge = 3;
+	else
+		precharge = 5;
+
 	/* Try to wait for any previous AUX channel activity */
 	for (try = 0; try < 3; try++) {
 		status = I915_READ(ch_ctl);
-- 
1.7.10