[Intel-gfx] [PATCH] drm/i915: Fix eDP blank screen after S3 resume on HP desktops

[Daniel Vetter]

On Wed, Jun 20, 2012 at 09:17:41AM +0200, Takashi Iwai wrote:
> This patch fixes the problem on some HP desktop machines with eDP
> which give blank screens after S3 resume.
> 
> The problem looks like a timing issue.  Although BLC_PWM_CPU_CTL
> register is already restored at the beginning of resume, it doesn't
> seem to take effect.  Simply re-issuing the  register write restores
> the backlight gracefully.
> 
> Tested with 3.5-rc3 kernel.
> 
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=49233
> 
> Signed-off-by: Takashi Iwai <tiwai at suse.de>

This patch looks very fishy as-is, simply because I don't like adding
random calls to random functions at pretty much random places without any
hint why it works. Just a few weeks ago we've had tons of fun with writes
that don't stick when the ring isn't yet set up. Can you please check with
a bunch of printks what exactly happens to the value of BLC_PWM_CPU_CTL?
I.e. whether the write doesn't stick or whether it gets reset somewhere
between the register restore functions and the new place.

I suspect the opregion_init call could allow the bios to frob with these
registers. If that's the case, the patch is missing a comment that to that
effect.

Essentially I want to know why this place here works and why not move the
call a few lines up or down.
-Daniel

> ---
>  drivers/gpu/drm/i915/i915_drv.c |    3 +++
>  1 file changed, 3 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
> index 9fe9ebe..2ba1350 100644
> --- a/drivers/gpu/drm/i915/i915_drv.c
> +++ b/drivers/gpu/drm/i915/i915_drv.c
> @@ -658,6 +658,9 @@ static int i915_drm_thaw(struct drm_device *dev)
>  
>  	intel_opregion_init(dev);
>  
> +	if (dev_priv->backlight)
> +		backlight_update_status(dev_priv->backlight);
> +
>  	dev_priv->modeset_on_lid = 0;
>  
>  	console_lock();
> -- 
> 1.7.10.4
> 
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-- 
Daniel Vetter
Mail: daniel at ffwll.ch
Mobile: +41 (0)79 365 57 48