[Intel-gfx] [PATCH] drm/i915: Do not read non-existent DPLL registers on PCH hardware

[Daniel Vetter]

On Wed, May 02, 2012 at 12:07:06PM +0100, Chris Wilson wrote:
> We only execute intel_decrease_pllclock for pre-PCH hardware, typically
> gen4 mobiles. However, in the variable declaration we did read from the
> non-PCH DPLL register, quite naughty and detected by SandyBridge.
> 
> Reported-by: Andrey Rahmatullin <wrar at wrar.name>
> References: https://bugs.freedesktop.org/show_bug.cgi?id=49025
> Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>
Picked up for -fixes (with Andrey's tested-by added), thanks for the patch.
-Daniel
-- 
Daniel Vetter
Mail: daniel at ffwll.ch
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