[Intel-gfx] [PATCH 02/12] drm/i915: DSL_LINEMASK is 12 bits only on gen2
Chris Wilson
chris at chris-wilson.co.uk
Thu May 3 13:55:32 CEST 2012
On Wed, 2 May 2012 22:55:44 -0300, Paulo Zanoni <przanoni at gmail.com> wrote:
> From: Paulo Zanoni <paulo.r.zanoni at intel.com>
>
> Gen3+ is 13 bits (12:0).
Gen3+ is 13 bits (12:0), and on gen2 only (11:0). For both the high bits
are marked reserved, read-only so continue to mask them.
> Signed-off-by: Paulo Zanoni <paulo.r.zanoni at intel.com>
Reviewed-by: Chris Wilson <chris at chris-wilson.co.uk>
-Chris
--
Chris Wilson, Intel Open Source Technology Centre
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