[Intel-gfx] [PATCH] drm/i915: rip out unnecessary calls to drm_mode_set_crtcinfo

[Daniel Vetter]

On Thu, May 03, 2012 at 03:51:58PM +0200, Daniel Vetter wrote:
> Our handling of the crtc timing computation has been nicely
> cargo-culted with calls to drm_mode_set_crtcinfo sprinkled all over
> the place. But with
> 
> commit f9bef081c3c3f77bec54454872e98d3ec635756f
> Author: Daniel Vetter <daniel.vetter at ffwll.ch>
> Date:   Sun Apr 15 19:53:19 2012 +0200
> 
>     drm/i915: don't clobber the special upscaling lvds timings
> 
> and
> 
> commit ca9bfa7eed20ea34e862804e62aae10eb159edbb
> Author: Daniel Vetter <daniel.vetter at ffwll.ch>
> Date:   Sat Jan 28 14:49:20 2012 +0100
> 
>     drm/i915: fixup interlaced vertical timings confusion, part 1
> 
> we now only set the crtc timing fields in the encoder->mode_fixup
> (lvds only) and in crtc->mode_fixup (for everyone else). And since
> 
> commit 75c13993db592343bda1fd62f2555fea037d56bd
> Author: Daniel Vetter <daniel.vetter at ffwll.ch>
> Date:   Sat Jan 28 23:48:46 2012 +0100
> 
>     drm/i915: fixup overlay checks for interlaced modes
> 
> the only places we actually need the crtc timings is in the mode_set
> function.
> 
> I guess the idea of the drm core is that every time it creates a drm
> mode, it also sets the timings. But afaics it never uses them, safe
> for the precise vblank timestamp code (but that can only run on active
> modes, i.e.  after our mode_fixup functions have been called). The
> problem is that drm core always sets CRTC_INTERLACE_HALVE_V, so the
> timings are pretty much bogus for us anyway (at least with interlaced
> support).
> 
> So I guess it's the drivers job that every active modes needs to have
> crtc timings that suits it, and with these patches we should have
> that. drm core doesn't seem to care about modes that just get passed
> around. Hence we can now safely rip out all the remaining calls to
> set_crtcinfo left in the driver and clean up this confusion.
> 
> Reviewed-by: Chris Wilson <chris at chris-wilson.co.uk>
> Signed-Off-by: Daniel Vetter <daniel.vetter at ffwll.ch>
Queued for -next, thanks for the review.
-Daniel
-- 
Daniel Vetter
Mail: daniel at ffwll.ch
Mobile: +41 (0)79 365 57 48