[Intel-gfx] [PATCH 13/14] drm/i915: ibx_write_infoframe can disable AVI
Daniel Vetter
daniel at ffwll.ch
Fri May 4 22:36:49 CEST 2012
On Fri, May 04, 2012 at 05:18:25PM -0300, Paulo Zanoni wrote:
> From: Paulo Zanoni <paulo.r.zanoni at intel.com>
>
> IBX does not need the workaround used in cpt_write_infoframe that
> requires the AVI frame to be enabled while being updated.
>
> Signed-off-by: Paulo Zanoni <paulo.r.zanoni at intel.com>
Minor bikeshed about the way you structure the patch series: Intead of
adding this avi-infoframe special case to the ironlake function, then
split out the ibx variant and remove it again for it, it's clearer when
you split up the functions first and only then add the cpt/ppt special
case to that function.
But it's just this hunk, so imo a resend is overkill. But for future patch
series which involve more fixes (like e.g. the irq_handler split-ups from
Chris Wilson I've merged recently) doing things this way is really much
better.
-Daniel
> ---
> drivers/gpu/drm/i915/intel_hdmi.c | 8 +-------
> 1 file changed, 1 insertion(+), 7 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_hdmi.c b/drivers/gpu/drm/i915/intel_hdmi.c
> index 6c9c901..e49cd22 100644
> --- a/drivers/gpu/drm/i915/intel_hdmi.c
> +++ b/drivers/gpu/drm/i915/intel_hdmi.c
> @@ -201,13 +201,7 @@ static void ibx_write_infoframe(struct drm_encoder *encoder,
> val &= ~(VIDEO_DIP_SELECT_MASK | 0xf); /* clear DIP data offset */
> val |= intel_infoframe_index(frame);
>
> - /* The DIP control register spec says that we need to update the AVI
> - * infoframe without clearing its enable bit */
> - if (frame->type == DIP_TYPE_AVI)
> - val |= VIDEO_DIP_ENABLE_AVI;
> - else
> - val &= ~intel_infoframe_enable(frame);
> -
> + val &= ~intel_infoframe_enable(frame);
> val |= VIDEO_DIP_ENABLE;
>
> I915_WRITE(reg, val);
> --
> 1.7.10
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx at lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Daniel Vetter
Mail: daniel at ffwll.ch
Mobile: +41 (0)79 365 57 48
More information about the Intel-gfx
mailing list