[Intel-gfx] [PATCH 1/2] drm/edid: adjust double-clocked cea modes

[Daniel Vetter]

On Mon, May 14, 2012 at 04:55:36PM -0300, Paulo Zanoni wrote:
> 2012/5/12 Daniel Vetter <daniel.vetter at ffwll.ch>:
> > The CEA spec has a bunch of very peculiar modes. For backwards
> > compatibility it specifies a bunch of modes that are suitable to
> > display old SD TV content. But these modes have such low pixel clocks
> > that pixels need to be doubled to reach the minimal clock of the HDMI
> > interface.
> >
> 
> I just tested the 2 patches. They don't work for me... My monitor
> complains the timings are not supported, and now I get a black screen
> instead of a screen with half of the vertical pixel columns.
> 
>                       HTOTAL_B: 0x035f02cf (720 active, 864 total)
>                       HBLANK_B: 0x035f02cf (720 start, 864 end)
>                        HSYNC_B: 0x031a02db (732 start, 795 end)
>                       VTOTAL_B: 0x026f023f (576 active, 624 total)
>                       VBLANK_B: 0x026f023f (576 start, 624 end)
>                        VSYNC_B: 0x02490243 (580 start, 586 end)
> 
> I believe the timings sent to the hardware must be the ones we were
> already sending before the patches...

Well, that is what actually _should_ happen. The crtc doubles every pixel,
so all horizontal timings should be twice what we program into the
registers. Looks like something is still amiss :(
-Daniel
-- 
Daniel Vetter
Mail: daniel at ffwll.ch
Mobile: +41 (0)79 365 57 48