[Intel-gfx] [PATCH] drm/i915: properly handle interlaced bit for sdvo dtd conversion

Daniel Vetter daniel at ffwll.ch
Tue May 22 09:24:59 CEST 2012


On Mon, May 21, 2012 at 03:38:34PM -0300, Paulo Zanoni wrote:
> 2012/5/12 Daniel Vetter <daniel.vetter at ffwll.ch>:
> > We've simply ignored this, which isn't too great. With this, interlaced
> > 1080i works on my HDMI screen connected through sdvo. For no apparent
> > reason anything else still doesn't work as it should.
> >
> > While at it, give these magic numbers in the dtd proper names and
> > add a comment that they match with EDID detailed timings.
> >
> > v2: Actually use the right bit for interlaced.
> >
> > Signed-Off-by: Daniel Vetter <daniel.vetter at ffwll.ch>
> 
> This looks like 2 different patches merged into one :)
> 
> In theory, bits 2 and 1 could have a different meaning too, but I'm
> not sure how applicable this is to sDVO. But yeah, I had to read this
> code in the past and 0x2 and 0x4 were not exactly nice to read, so at
> least now those bits have a name :)
> 
> Not tested, just reviewed against the sdvo and edid specs...
> Reviewed-by: Paulo Zanoni <paulo.r.zanoni at intel.com>
Picked up for -fixes, thanks for the review.
-Daniel
-- 
Daniel Vetter
Mail: daniel at ffwll.ch
Mobile: +41 (0)79 365 57 48



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