[Intel-gfx] [PATCH 02/11] drm/i915: Add SURFLIVE register definitions

[Daniel Vetter]

On Thu, Nov 1, 2012 at 3:16 PM, Ville Syrjälä
<ville.syrjala at linux.intel.com> wrote:
> On Wed, Oct 31, 2012 at 11:57:00PM +0100, Daniel Vetter wrote:
>> On Wed, Oct 31, 2012 at 01:23:05PM -0700, Jesse Barnes wrote:
>> > On Wed, 31 Oct 2012 17:50:15 +0200
>> > ville.syrjala at linux.intel.com wrote:
>> >
>> > > From: Ville Syrjälä <ville.syrjala at linux.intel.com>
>> > >
>> > > Signed-off-by: Ville Syrjälä <ville.syrjala at linux.intel.com>
>>
>> Fails to apply here somehow. Also, this thing is base64 encoded, which
>> confused my normal workflow for a bit ... Dunno what exactly caused this
>> havoc.
>
> Strange. I had it sitting on top of drm-intel-next when I sent it.
>
> The whole series seems to be base64 after I got it back from the list.
> Maybe it's out wonderful mail system trying to do something clever.
> Base64 itself shouldn't disturb git-am & co.

Yeah, git am coped fine, but patch was a bit upset. I've then feed it
the decoded text/plain part, which resulted in some strange conflicts.
Dunno what has happened there. Can you simply resend a new patch
rebased on top of latest dinq?

Thanks, Daniel
-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch