[Intel-gfx] [PATCH 4/8] drm/i915: implement WaDisableVLVClockGating_VBIIssue on VLV

[Antti Koskipää]

Hi,

On 10/25/12 22:15, Jesse Barnes wrote:
> This allows us to get the right vblank interrupt frequency.
> 
> v2: pull in register definition
> 
> Signed-off-by: Jesse Barnes <jbarnes at virtuousgeek.org>
> ---
>  drivers/gpu/drm/i915/i915_reg.h |    2 ++
>  drivers/gpu/drm/i915/intel_pm.c |    7 +++++++
>  2 files changed, 9 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index 6464eaa..4aec0a3 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -556,6 +556,8 @@
>  #define IIR		0x020a4
>  #define IMR		0x020a8
>  #define ISR		0x020ac
> +#define VLV_GUNIT_CLOCK_GATE	0x182060

Where did you pull this offset from? It's not in the Bspec.


> +#define   GCFG_DIS		(1<<8)
>  #define VLV_IIR_RW	0x182084
>  #define VLV_IER		0x1820a0
>  #define VLV_IIR		0x1820a4
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index d04e87f..88c154c 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -3713,6 +3713,13 @@ static void valleyview_init_clock_gating(struct drm_device *dev)
>  		   PIPEA_HLINE_INT_EN | PIPEA_VBLANK_INT_EN |
>  		   SPRITEB_FLIPDONE_INT_EN | SPRITEA_FLIPDONE_INT_EN |
>  		   PLANEA_FLIPDONE_INT_EN);
> +
> +	/*
> +	 * WaDisableVLVClockGating_VBIIssue
> +	 * Disable clock gating on th GCFG unit to prevent a delay
> +	 * in the reporting of vblank events.
> +	 */
> +	I915_WRITE(VLV_GUNIT_CLOCK_GATE, GCFG_DIS);
>  }
>  
>  static void g4x_init_clock_gating(struct drm_device *dev)

-- 
- Antti