[Intel-gfx] [PATCH 0/8] lvds cleanup
Daniel Vetter
daniel.vetter at ffwll.ch
Mon Nov 5 13:28:19 CET 2012
Hi all,
This is the first cleanup from my next stab at reworking the modeset code, with
the ultimate goal that we can compute the entire configuration (fdi config, pll
config, sharing of global resources) up-front, before touching the hw at all.
Together with some neat hw state readout this should make fastboot much more
solid, and obviously it's a requirement to properly implement the check mode of
atomic modeset.
Here I move some of the lvds stuff out of line, simple to better see through the
jungle. The newly-added pre_pll_enable callback might be unnecessary in the end,
since I think we should also move the pll enabling into the crtc_enable callback
and out of ->mode_set. Also, we need some notion of exclusive pch_pll (which the
lvds port needs to obey the modeset sequence) and stop disabling pch plls
unconditionally, since they might be in use by another active pipe. But that is
all stuff on top, once the entire clock handling rework settles.
For context, my current wip (iow: where I am stuck atm ...):
http://cgit.freedesktop.org/~danvet/drm/log/?h=modeset-rework
Comments, flames and test reports highly welcome.
Cheers, Daniel
Daniel Vetter (8):
drm/i915: add encoder->pre_pll_enable callback
drm/i915: replace ad-hoc dual-link lvds checks
drm/i915: move is_dual_link_lvds to intel_lvds.c
drm/i915: track is_dual_link in intel_lvds
drm/i915: add intel_lvds->reg
drm/i915: move intel_update_lvds to intel_lvds->pre_pll_enable
drm/i915: enable intel_lvds->pre_pll_enable for ilk+, too
drm/i915: rip out pre-DDI stuff from haswell_crtc_mode_set
drivers/gpu/drm/i915/intel_display.c | 287 +++--------------------------------
drivers/gpu/drm/i915/intel_drv.h | 2 +
drivers/gpu/drm/i915/intel_lvds.c | 161 +++++++++++++++++---
3 files changed, 164 insertions(+), 286 deletions(-)
--
1.7.11.7
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