[Intel-gfx] [PATCH] drm/i915: drop buggy write to FDI_RX_CHICKEN register

[Chris Wilson]

On Wed, 14 Nov 2012 17:47:39 +0100, Daniel Vetter <daniel.vetter at ffwll.ch> wrote:
> Jani Nikula noticed that the parentheses are wrong and we & the bit
> with the register address instead of the read-back value. He sent a
> patch to correct that.
> 
> On second look, we write the same register in the previous line, and
> the w/a seems to be to set FDI_RX_PHASE_SYNC_POINTER_OVR to enable the
> logic, then keep always set FDI_RX_PHASE_SYNC_POINTER_OVR and toggle
> ~FDI_RX_PHASE_SYNC_POINTER_EN before/after enabling the pc transcoder.
> 
> So the right things seems to be to simply kill the 2nd write.
> 
> Cc: Jani Nikula <jani.nikula at intel.com>
> Signed-off-by: Daniel Vetter <daniel.vetter at ffwll.ch>

Looks sane(r).
Reviewed-by: Chris Wilson <chris at chris-wilson.co.uk>
-Chris

-- 
Chris Wilson, Intel Open Source Technology Centre