[Intel-gfx] [PATCH] drm/i915: disable cpu relocs on ilk and earlier

[Daniel Vetter]

They seem to be implicated in render corruptions. And up to now no one
really seems to understand the issue, so let's just disable them for
now. Most of the machines exhibiting this issue have only a 128 gtt
mmio window, so increased pressure on the mappable part (and so higher
chance for cpu relocs) seems to be the key.

Bugzilla: https://bugzilla.redhat.com/show_bug.cgi?id=852210
Cc: Dave Airlie <airlied at gmail.com>
Cc: stable at vger.kernel.org
[Note for stable, there's a minor conflict in the context since we've
tuned cpu relocs on gen6+ a bit in 3.7.]
Signed-off-by: Daniel Vetter <daniel.vetter at ffwll.ch>
---
 drivers/gpu/drm/i915/i915_gem_execbuffer.c |    6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
index 6a2f3e5..4052ac5 100644
--- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
+++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
@@ -95,6 +95,12 @@ eb_destroy(struct eb_objects *eb)
 
 static inline int use_cpu_reloc(struct drm_i915_gem_object *obj)
 {
+	/* cpu relocs are implicated in some not-yet-understood render
+	 * corruptions on at least ilk, but probably also gm45. Until we know
+	 * what's going on, just disable them. */
+	if (INTEL_INFO(obj->base.dev)->gen < 6)
+		return false;
+
 	return (obj->base.write_domain == I915_GEM_DOMAIN_CPU ||
 		!obj->map_and_fenceable ||
 		obj->cache_level != I915_CACHE_NONE);
-- 
1.7.10.4