[Intel-gfx] [PATCH 3/3] drm/i915: disable wc gtt pte mappings on gen2

[Chris Wilson]

On Wed, 10 Oct 2012 23:14:01 +0200, Daniel Vetter <daniel.vetter at ffwll.ch> wrote:
> It doesn't work since the gtt pte range sits in the middle of the mmio
> bar. We didn't notice that since both my and Chris' gen2 machines
> don't support PAT and hence all wc io mapping request will
> automatically be demoted to uc.
> 
> This regression has been introduce in
> 
> commit edef7e685da05c13cce50c0126189c80fe2c8f71
> Author: Chris Wilson <chris at chris-wilson.co.uk>
> Date:   Fri Sep 14 11:57:47 2012 +0100
> 
>     agp/intel: Use a write-combining map for updating PTEs
> 
> Reported-by: Egbert Eich <eich at pdx.freedesktop.org>
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=55834
> Signed-off-by: Daniel Vetter <daniel.vetter at ffwll.ch>

Thanks for the explanation,
Acked-by: Chris Wilson <chris at chris-wilson.co.uk>
-Chris

-- 
Chris Wilson, Intel Open Source Technology Centre