[Intel-gfx] [PATCH 09/24] drm/i915: Fix location of stolen memory register for SandyBridge+

Jesse Barnes jbarnes at virtuousgeek.org
Thu Oct 11 21:06:19 CEST 2012


On Thu, 11 Oct 2012 11:43:53 -0700
Jesse Barnes <jbarnes at virtuousgeek.org> wrote:

> On Tue,  4 Sep 2012 21:03:01 +0100
> Chris Wilson <chris at chris-wilson.co.uk> wrote:
> 
> > A few of the earlier registers where enlarged and so the Base Data of
> > Stolem Memory Register (BDSM) was pushed to 0xb0.
> > 
> > Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>
> > ---
> >  drivers/gpu/drm/i915/i915_gem_stolen.c |    9 ++++++++-
> >  1 file changed, 8 insertions(+), 1 deletion(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/i915_gem_stolen.c b/drivers/gpu/drm/i915/i915_gem_stolen.c
> > index a01ff74..a528e4a 100644
> > --- a/drivers/gpu/drm/i915/i915_gem_stolen.c
> > +++ b/drivers/gpu/drm/i915/i915_gem_stolen.c
> > @@ -63,7 +63,11 @@ static unsigned long i915_stolen_to_physical(struct drm_device *dev)
> >  	 * its value of TOLUD.
> >  	 */
> >  	base = 0;
> > -	if (INTEL_INFO(dev)->gen > 3 || IS_G33(dev)) {
> > +	if (INTEL_INFO(dev)->gen >= 6) {
> > +		/* Read Base Data of Stolen Memory Register (BDSM) directly */
> > +		pci_read_config_dword(pdev, 0xB0, &base);
> > +		base &= ~4095; /* lower bits used for locking register */
> > +	} else if (INTEL_INFO(dev)->gen > 3 || IS_G33(dev)) {
> >  		/* Read Graphics Base of Stolen Memory directly */
> >  		pci_read_config_dword(pdev, 0xA4, &base);
> >  #if 0
> > @@ -172,6 +176,9 @@ int i915_gem_init_stolen(struct drm_device *dev)
> >  	if (dev_priv->mm.stolen_base == 0)
> >  		return 0;
> >  
> > +	DRM_DEBUG_KMS("found %d bytes of stolen memory at %08lx\n",
> > +		      dev_priv->mm.gtt->stolen_size, dev_priv->mm.stolen_base);
> > +
> >  	/* Basic memrange allocator for stolen space */
> >  	drm_mm_init(&dev_priv->mm.stolen, 0, prealloc_size);
> >  
> 
> A bit scary we've had this around so long?  And now I can't find docs
> for this...  Assuming it tests out ok though:
> 
> Reviewed-by: Jesse Barnes <jbarnes at virtuousgeek.org>

Ok finally found this in the device 0 docs.  0xb0 is correct.  However,
I think we could use the MCHBAR mirror of this too at 0x1080c0 or the
device 2 config space register 0x5c instead if we wanted.

-- 
Jesse Barnes, Intel Open Source Technology Center



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