[Intel-gfx] [ANNOUNCE] xf86-video-intel 2.20.10
Chris Wilson
chris at chris-wilson.co.uk
Sun Oct 14 17:42:23 CEST 2012
The last couple of weeks have been fairly retrospective, a dive into
prehistory tidying up the earlier generations which lay languishing as
the core progressed and lead to a number of annoying core bugs being
fixed.
-Chris
* Release DRM master earlier during shutdown so switching between
multiple X servers works automatically.
https://bugs.freedesktop.org/show_bug.cgi?id=55446
* Suppress error propagation from DRI2GetMSC and behave as if the pipe
was simply off to avoid unexpected errors in the clients
https://bugs.freedesktop.org/show_bug.cgi?id=55395
* A few fixes to i8xx batch emission, ensuring that the GPU is always
in a valid state.
https://bugs.freedesktop.org/show_bug.cgi?id=55455
* Prevent a use-after-free during UXA shutdown due to inspecting
the glamor flags after the glamor interface had been freed.
* Prevent a crash combining TearFree and rotations.
https://bugs.freedesktop.org/show_bug.cgi?id=55527
* Correct a missing damage upload along PutImage after using the CPU bo
as a source for the GPU.
https://bugs.freedesktop.org/show_bug.cgi?id=55508
* Fix compilation for older glibc without O_CLOEXEC
https://bugs.freedesktop.org/show_bug.cgi?id=55577
* Fix out-of-tree builds failing to recompile the gen4 assemblies
https://bugs.freedesktop.org/show_bug.cgi?id=55645
* Fix non-standard build host configuration handling for intel-gen4asm
https://bugs.freedesktop.org/show_bug.cgi?id=55646
* Fix a potential batch buffer overflow when replacing the last BLT fill
operation with a copy
https://bugs.freedesktop.org/show_bug.cgi?id=55700
* Flush the render pipeline more frequently on Ironlake as not all
pipelined state changes are.
https://bugs.freedesktop.org/show_bug.cgi?id=51422
* Detect when we need to read the destination for the background raster
op during fallbacks.
https://bugs.freedesktop.org/show_bug.cgi?id=55810
* Avoid a potential deference of an invalid CPU mmap after doing an
inplace tiled upload.
https://bugs.freedesktop.org/show_bug.cgi?id=55812
* Prevent sign extension when packing the upload data for CopyPlane
https://bugs.freedesktop.org/show_bug.cgi?id=55823
* Fix some render corruption with a UDL slave output and pageflipping
Chris Wilson (54):
sna: Release the front buffer and drop DRM master early during shutdown
sna/dri: Swallow error from GetMSC
sna: set_cacheing returns a bool not an error-code
sna: Make sure the CPU bo is destroyed if we fail to mmap it during alloc
sna/dri: Improve handling of async/sync pageflip transition
sna/dri: Only chain to a triple buffer pageflip sequence
sna: Cache repeated use of the temporary CPU mapping for tiled_x uploads
sna/dri: Check back/front buffers of a pixmap for format change
sna/gen2: Clear STIPPLE setup before rendering with the 3D pipeline
uxa: Remove USE_GLAMOR check from unrealize glyph caches
sna: Remember to call ValidatePicture() before using newly created Pictures
sna: Avoid accumulating damage to the CPU if it is already damaged
sna: Tweak CPU damage partial upload paths
sna: Actually upload the damage when replacing a busy CPU bo for PutImage
sna: Prevent sna_damage_contains_box__no_reduce() from a NULL deref
sna: Review sna_pixmap->cpu tracking
sna/dri: Delay the deactivation of the pageflipping
sna/gen7: Tidy detection of unbounded render op
sna: Fix an instance of undamaged tracking
sna: Protect against undefined O_CLOEXEC
sna: Clear sna_pixmap->cpu when destroying the CPU damage
sna/gen2: Setup invariant blend arguments
sna/gen2: Allow fine damage tracking for render operations
sna: Avoid using the gpu for uploads whilst wedged
sna: Once again look into assertions around sna_pixmap->cpu
sna/gen2: Prevent using the GTT maps with I915_TILING_Y on 855gm
sna: Propagate failures from compositing glyph masks
sna: Remove another sna_pixmap->cpu assertion that was not true
sna/gen2: Tidy DBG code for disabling composite operations
sna: Refactor the fallback CopyArea to use the common region computation
configure: Make rebuilding of the gen4 assembly files explicit
sna: Do not create an unsnooped CPU mapping for readbacks
sna/gen2: Add a couple of assertions to track down a batch overflow
sna/gen2: Compile fix
sna/gen2: And the other compile failure
Use path for intel-gen4asm derived from pkg-config
sna/gen2: Count the number of dwords required for the invariant
sna: Only reduce the maximum batch size for old kernels
sna: Check that for batch overflows after advancing a BLT
sna: Check that we have sufficient space for a copy when replacing a fill
sna: Fix check_reloc_and_exec typo
sna/gen5: Flush pipelined ops when changing state
sna: Pass the region, not its pointer, when moving the GC to the CPU
sna: Also check the bg rrop for reads when deciding upon fallback placement
sna: Check the map exists before trying to release it
sna/gen6+: Initialize the damage for fill-boxes
sna: Prevent sign-extension when manipulating strides
sna: Use high/low watermarks for fenced aperture counting
sna: Limit available space for gen2
sna: Rearrange switch to suppress a compiler warning in sna_copy_plane_blt()
sna/gen7: Replace bogus state tracking assertion
sna: Correct a bogus assertion after inplace PutImage
sna/overlay: Trim suggested BestSize to fit within the overlay constraints
2.20.10 release
Dave Airlie (1):
intel: fix fullscreen damage posting on pageflip
Josh Triplett (1):
Fix out-of-tree builds with intel-gen4asm installed
Paulo Zanoni (1):
Fix possible_clones computation for shared encoders between outputs
git tag: 2.20.10
http://xorg.freedesktop.org/archive/individual/driver/xf86-video-intel-2.20.10.tar.bz2
MD5: a0b1a491e512d8be12605c66445a12fd xf86-video-intel-2.20.10.tar.bz2
SHA1: 9972427989448bc9f1e2cd2f598d67398d1e61be xf86-video-intel-2.20.10.tar.bz2
SHA256: df41a28c3d877f3c5e87cd7d840f51fd38dde8bc91f5f0d09510fb8e2336cdcd xf86-video-intel-2.20.10.tar.bz2
http://xorg.freedesktop.org/archive/individual/driver/xf86-video-intel-2.20.10.tar.gz
MD5: e48b37a373e6e5e45e917efdf4c8b52e xf86-video-intel-2.20.10.tar.gz
SHA1: 568fea071ba649a6c885ab18ee405759a76ad767 xf86-video-intel-2.20.10.tar.gz
SHA256: 6911d09c140025c7e0fd283e923d67fcfaea40ce2bae6e7388b4c794a473b0f9 xf86-video-intel-2.20.10.tar.gz
--
Chris Wilson, Intel Open Source Technology Centre
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