[Intel-gfx] [PATCH] drm/i915: Set DERRMR around batches required vblank events

Daniel Vetter daniel at ffwll.ch
Tue Oct 16 16:15:40 CEST 2012


On Tue, Oct 16, 2012 at 11:47 AM, Chris Wilson <chris at chris-wilson.co.uk> wrote:
>
> I am still not convinced this fixes anything as at the moment I am
> simply unable to detect any tearing on my ivb setup if I apply any form of
> vblank throttling.
>
> The other issue is that I think if I had a SECURE
> (DRM_MASTER|DRM_ROOT_ONLY) batch buffer I could probably do all of this
> in userspace.

Yeah, I'm a bit torn between this approach and just allowing SECURE
batches. The big upside of secure batches is that it allows more
flexibility (if the LRI really work from secure batches and not just
from the ring). The only downside I can see is that we won't be able
to arbitrage the derrmr bits (since only one is allowed to be set at
any given time) between different userspace processes. But I don't see
mutliple concurrent display servers (with cooperative owenership of
the hw) happening anytime soon, so I won't worry about this before it
happens. Syncing against modeset should still work with our MI_WAIT
related waits on fbs before we disable the pipe.

The other issue (only on gen7) is that this will keep the gpu out of
rc6 (and hence the entire package) for long times, especially on
mostly-idle video playback. I don't think that massively increased
power consumption is what users will appreciated.

Now with the Tearfree option and you saying that vblank render
throttling mostly fixes this, do we have any unhappy bug reporters
left? In that case I'd prefer to just can this entirely (and suggest
to ppl to use a real compositor - the wasted bw issue on X also seems
to be on track to be solved).

Cheers, Daniel
-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch



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