[Intel-gfx] [PATCH 1/6] drm/i915/crt: don't set HOTPLUG bits on !PCH
Paulo Zanoni
przanoni at gmail.com
Wed Oct 17 23:31:10 CEST 2012
2012/10/12 Daniel Vetter <daniel.vetter at ffwll.ch>:
> On Fri, Oct 12, 2012 at 7:17 PM, Paulo Zanoni <przanoni at gmail.com> wrote:
>> Ok, so please do a final test: try to write something to those
>> "must-be-preserved" bits and check if the values stay or not. If after
>> writing 1 to bits 17-18, 20-23 you read 0, then you have my
>> Reviewed-by: Paulo Zanoni <paulo.r.zanoni at intel.com>. I still do plan
>> to test the 6 patches of the series on hsw later btw.
>
> I've tested a few bits on a few machines, and some do stick and some
> cause ... strange things (like a seemingly random set of other
> register bits also being set). I guess that's not the answer you've
> been looking for. I'd still prefer if we just try to clear things,
> worst case we can easily read out the current state of these reserved
> bits at boot up and restore them at resume time. But I'd really prefer
> if we reduce our reliance on the boot-up state from the bios as much
> as possible. And in this case here the only way to figure things out
> is to merge it (it's really early for 3.8 anyway) and see what
> happens.
Well, ok then... Both the old and the new version don't exactly follow
the spec, but I guess writing zero makes more sense than enabling
random bits, especially because you said you checked and your machines
actually have zeros on those bits.
Reviewed-by: Paulo Zanoni <paulo.r.zanoni at intel.com>
>
> Cheers, Daniel
> --
> Daniel Vetter
> Software Engineer, Intel Corporation
> +41 (0) 79 365 57 48 - http://blog.ffwll.ch
--
Paulo Zanoni
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