[Intel-gfx] [PATCH 2/6] drm/i915/crt: explicitly set up HOTPLUG_BITS on resume

Paulo Zanoni przanoni at gmail.com
Wed Oct 17 23:42:26 CEST 2012


Hi

2012/10/11 Daniel Vetter <daniel.vetter at ffwll.ch>:
> ... instead of relying on the register save/restore madness to do this.
>
> To extract a bit of code call drm_mode_config_reset both on resume
> and boot-up and move the hw state frobbing from the crt_init to the
> ->reset callback. The crt connector is the only one with a ->reset
> callback, hence we can easily do this.

The patch looks correct, but doesn't it make more sense to add some
encoder-specific "intel_sanitize_encoder" callback instead of reusing
drm's ->reset ? Maybe we're distorting the meaning of the ->reset
callback?

This is just a bikeshed, not a strong opinion, so feel free to merge
it as it is:
Reviewed-by: Paulo Zanoni <paulo.r.zanoni at intel.com>

>
> Signed-off-by: Daniel Vetter <daniel.vetter at ffwll.ch>
> ---
>  drivers/gpu/drm/i915/i915_drv.c      |  1 -
>  drivers/gpu/drm/i915/intel_crt.c     | 26 +++++++++++++-------------
>  drivers/gpu/drm/i915/intel_display.c |  2 ++
>  3 files changed, 15 insertions(+), 14 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
> index a7837e5..2aabce7 100644
> --- a/drivers/gpu/drm/i915/i915_drv.c
> +++ b/drivers/gpu/drm/i915/i915_drv.c
> @@ -547,7 +547,6 @@ static int i915_drm_thaw(struct drm_device *dev)
>
>                 intel_modeset_init_hw(dev);
>                 intel_modeset_setup_hw_state(dev);
> -               drm_mode_config_reset(dev);
>                 drm_irq_install(dev);
>         }
>
> diff --git a/drivers/gpu/drm/i915/intel_crt.c b/drivers/gpu/drm/i915/intel_crt.c
> index 46c90f5..53f3e87 100644
> --- a/drivers/gpu/drm/i915/intel_crt.c
> +++ b/drivers/gpu/drm/i915/intel_crt.c
> @@ -662,10 +662,22 @@ static int intel_crt_set_property(struct drm_connector *connector,
>  static void intel_crt_reset(struct drm_connector *connector)
>  {
>         struct drm_device *dev = connector->dev;
> +       struct drm_i915_private *dev_priv = dev->dev_private;
>         struct intel_crt *crt = intel_attached_crt(connector);
>
> -       if (HAS_PCH_SPLIT(dev))
> +       if (HAS_PCH_SPLIT(dev)) {
> +               u32 adpa;
> +
> +               adpa = I915_READ(PCH_ADPA);
> +               adpa &= ~ADPA_CRT_HOTPLUG_MASK;
> +               adpa |= ADPA_HOTPLUG_BITS;
> +               I915_WRITE(PCH_ADPA, adpa);
> +               POSTING_READ(PCH_ADPA);
> +
> +               DRM_DEBUG_KMS("pch crt adpa set to 0x%x\n", adpa);
>                 crt->force_hotplug_required = 1;
> +       }
> +
>  }
>
>  /*
> @@ -784,18 +796,6 @@ void intel_crt_init(struct drm_device *dev)
>          * Configure the automatic hotplug detection stuff
>          */
>         crt->force_hotplug_required = 0;
> -       if (HAS_PCH_SPLIT(dev)) {
> -               u32 adpa;
> -
> -               adpa = I915_READ(PCH_ADPA);
> -               adpa &= ~ADPA_CRT_HOTPLUG_MASK;
> -               adpa |= ADPA_HOTPLUG_BITS;
> -               I915_WRITE(PCH_ADPA, adpa);
> -               POSTING_READ(PCH_ADPA);
> -
> -               DRM_DEBUG_KMS("pch crt adpa set to 0x%x\n", adpa);
> -               crt->force_hotplug_required = 1;
> -       }
>
>         dev_priv->hotplug_supported_mask |= CRT_HOTPLUG_INT_STATUS;
>  }
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index d469b42..ffc3758 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -8334,6 +8334,8 @@ void intel_modeset_setup_hw_state(struct drm_device *dev)
>         intel_modeset_update_staged_output_state(dev);
>
>         intel_modeset_check_state(dev);
> +
> +       drm_mode_config_reset(dev);
>  }
>
>  void intel_modeset_gem_init(struct drm_device *dev)
> --
> 1.7.11.2
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx at lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx



-- 
Paulo Zanoni



More information about the Intel-gfx mailing list