[Intel-gfx] [PATCH 2/5] drm/i915: implement WaDisableRenderCachePipelinedFlush

[Chris Wilson]

On Thu, 18 Oct 2012 11:49:51 +0200, Daniel Vetter <daniel.vetter at ffwll.ch> wrote:
> Comment says for eaglelake/cantiga, but it's listed in the ilk table,
> too. So apply it to both.
> 
> Signed-off-by: Daniel Vetter <daniel.vetter at ffwll.ch>

Looks harmless due to the massive number of other p/c errata and that
pipelined render cache flushes have never been relied upon.

Reviewed-by: Chris Wilson <chris at chris-wilson.co.uk>
-Chris

-- 
Chris Wilson, Intel Open Source Technology Centre