[Intel-gfx] [PATCH 06/10] drm/i915: Stop using AGP layer for GEN6+
Ben Widawsky
ben at bwidawsk.net
Tue Oct 23 22:27:36 CEST 2012
On Tue, 23 Oct 2012 22:03:21 +0200
Daniel Vetter <daniel at ffwll.ch> wrote:
> On Tue, Oct 23, 2012 at 9:57 PM, Ben Widawsky <ben at bwidawsk.net> wrote:
> >> On Tue, Oct 23, 2012 at 4:57 PM, Ben Widawsky <ben at bwidawsk.net> wrote:
> >> > Actually, after we introduce the FLSH_CNTL patch from Jesse/me later in the
> >> > series, I think we just want a POSTING_READ on that register. It is
> >> > technically "required" by our desire to some day WC the registers, and
> >> > should synchronize everything else for us.
> >> >
> >> > After a quick read of memory_barriers.txt (again), I think mmiowb is
> >> > actually what we might want in addition to the POSTING_READ I'd add.
> >>
> >> Imo we have special rules for the igd, since clearly not all registers
> >> in our 4mb mmio window are equal. So I'd prefer the keep the readback
> >> of the last pte write (to ensure those are flushed out) and maybe also
> >> add a readback of the gfx_flsh_cntl reg (like I've seen in some
> >> internal vlv tree). Just to be paranoid.
> >> -Daniel
> >
> > What's your definition of flush? I think we just need one read to
> > satisfy the device I/O flush, and I think the write to the regsiter
> > should satisy the TLB flush. That leads me to the conclusion that just
> > the POSTING_READ of the FLSH_CNTL register is sufficient.
> >
> > If you want me to do both, I have no problem with that either, and I'll
> > just update the comment to say that we believe it is unnecessary.
> >
> > I don't really care either way.
>
> I think we need both, otherwise one of the pte writes might not have
> arrived at the endpoint when the chip is purging the tlb already,
> which might give is a tiny window where we load an invalid entry into
> the tlb. Tiny window, but I'm paranoid ;-) And yes, I know that's more
> strict than what docs say, but our igd also seems to be less coherent
> than what docs claim.
> -Daniel
Hmm, that's a good point. If we write the last pte, and then flsh_cntl,
and then posting_read on flsh_cntl; I think it is also fine. (Unless
writes can be reordered)
--
Ben Widawsky, Intel Open Source Technology Center
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