[Intel-gfx] [PATCH 7/9] drm/i915: drop unnecessary check from fdi_link_train code

[Paulo Zanoni]

Hi

2012/10/26 Daniel Vetter <daniel.vetter at ffwll.ch>:
> They are all written for a specific north disaplay->pch combination.
> So stop pretending otherwise.
>

So how about we go deeper in this "stop pretending" thing and add some
checks inside intel_detect_pch printing loud messages in case the CPU
and the PCH are not soulmates?

I don't feel good about this, but, well, let's assume that soon we
will have the loud error message:
Reviewed-by: Paulo Zanoni <paulo.r.zanoni at intel.com>

> Signed-off-by: Daniel Vetter <daniel.vetter at ffwll.ch>
> ---
>  drivers/gpu/drm/i915/intel_display.c | 14 +++++---------
>  1 file changed, 5 insertions(+), 9 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index 991adc1..7a9cfc2 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -2367,11 +2367,9 @@ static void ironlake_fdi_link_train(struct drm_crtc *crtc)
>         udelay(150);
>
>         /* Ironlake workaround, enable clock pointer after FDI enable*/
> -       if (HAS_PCH_IBX(dev)) {
> -               I915_WRITE(FDI_RX_CHICKEN(pipe), FDI_RX_PHASE_SYNC_POINTER_OVR);
> -               I915_WRITE(FDI_RX_CHICKEN(pipe), FDI_RX_PHASE_SYNC_POINTER_OVR |
> -                          FDI_RX_PHASE_SYNC_POINTER_EN);
> -       }
> +       I915_WRITE(FDI_RX_CHICKEN(pipe), FDI_RX_PHASE_SYNC_POINTER_OVR);
> +       I915_WRITE(FDI_RX_CHICKEN(pipe), FDI_RX_PHASE_SYNC_POINTER_OVR |
> +                  FDI_RX_PHASE_SYNC_POINTER_EN);
>
>         reg = FDI_RX_IIR(pipe);
>         for (tries = 0; tries < 5; tries++) {
> @@ -2477,8 +2475,7 @@ static void gen6_fdi_link_train(struct drm_crtc *crtc)
>         POSTING_READ(reg);
>         udelay(150);
>
> -       if (HAS_PCH_CPT(dev))
> -               cpt_phase_pointer_enable(dev, pipe);
> +       cpt_phase_pointer_enable(dev, pipe);
>
>         for (i = 0; i < 4; i++) {
>                 reg = FDI_TX_CTL(pipe);
> @@ -2609,8 +2606,7 @@ static void ivb_manual_fdi_link_train(struct drm_crtc *crtc)
>         POSTING_READ(reg);
>         udelay(150);
>
> -       if (HAS_PCH_CPT(dev))
> -               cpt_phase_pointer_enable(dev, pipe);
> +       cpt_phase_pointer_enable(dev, pipe);
>
>         for (i = 0; i < 4; i++) {
>                 reg = FDI_TX_CTL(pipe);
> --
> 1.7.11.4
>
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-- 
Paulo Zanoni