[Intel-gfx] [PATCH 03/18] drm/i915: Fix location of stolen memory register for SandyBridge+

[Ben Widawsky]

On Fri, 19 Oct 2012 18:03:09 +0100
Chris Wilson <chris at chris-wilson.co.uk> wrote:

> A few of the earlier registers where enlarged and so the Base Data of
> Stolen Memory Register (BDSM) was pushed to 0xb0.
> 
> Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>
> Reviewed-by: Jesse Barnes <jbarnes at virtuousgeek.org>

This patch seems irrelevant to me. I have a i915_stolen_to_phys which
already looks correct (git blame shows you last updated it in April).

Can you help unconfuse me?

> ---
>  drivers/gpu/drm/i915/i915_gem_stolen.c |   12 +++++++++++-
>  1 file changed, 11 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_gem_stolen.c
> b/drivers/gpu/drm/i915/i915_gem_stolen.c index a01ff74..d023ed6 100644
> --- a/drivers/gpu/drm/i915/i915_gem_stolen.c
> +++ b/drivers/gpu/drm/i915/i915_gem_stolen.c
> @@ -63,7 +63,14 @@ static unsigned long
> i915_stolen_to_physical(struct drm_device *dev)
>  	 * its value of TOLUD.
>  	 */
>  	base = 0;
> -	if (INTEL_INFO(dev)->gen > 3 || IS_G33(dev)) {
> +	if (INTEL_INFO(dev)->gen >= 6) {
> +		/* Read Base Data of Stolen Memory Register (BDSM)
> directly.
> +		 * Note that there is also a MCHBAR miror at
> 0x1080c0 or
> +		 * we could use device 2:0x5c instead.
> +		*/
> +		pci_read_config_dword(pdev, 0xB0, &base);
> +		base &= ~4095; /* lower bits used for locking
> register */
> +	} else if (INTEL_INFO(dev)->gen > 3 || IS_G33(dev)) {
>  		/* Read Graphics Base of Stolen Memory directly */
>  		pci_read_config_dword(pdev, 0xA4, &base);
>  #if 0
> @@ -172,6 +179,9 @@ int i915_gem_init_stolen(struct drm_device *dev)
>  	if (dev_priv->mm.stolen_base == 0)
>  		return 0;
>  
> +	DRM_DEBUG_KMS("found %d bytes of stolen memory at %08lx\n",
> +		      dev_priv->mm.gtt->stolen_size,
> dev_priv->mm.stolen_base); +
>  	/* Basic memrange allocator for stolen space */
>  	drm_mm_init(&dev_priv->mm.stolen, 0, prealloc_size);
>  



-- 
Ben Widawsky, Intel Open Source Technology Center