[Intel-gfx] [PATCH] drm/i915: Flush using only the correct base address register

[Daniel Vetter]

On Tue, Oct 30, 2012 at 09:01:57AM -0200, Paulo Zanoni wrote:
> Hi
> 
> 2012/10/29 Damien Lespiau <damien.lespiau at gmail.com>:
> > From: Damien Lespiau <damien.lespiau at intel.com>
> >
> > We were writing DSP_ADDR and DSP_SURF unconditionally. This did not
> > trigger an unclaimed write before HSW as the address of DSP_ADDR has
> > been repurposed as DSP_LINOFF.
> >
> > On HSW, though, DSP_LINOFF has been removed and then writting to it
> > triggers an unclaimed write.
> >
> > This patch writes to DSP_ADDR or DSP_SURF to flush the display plane
> > configuration depending on the gen we're running on.
> >
> > Signed-off-by: Damien Lespiau <damien.lespiau at intel.com>
> 
> Looks correct.
> 
> Reviewed-by: Paulo Zanoni <paulo.r.zanoni at intel.com>

Queued for -next, thanks for the patch.
-Daniel
-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch