[Intel-gfx] [PATCH 29/36] drm/i915: use PIPECONF_INTERLACE_MASK_HSW on lpt_enable_pch_transcoder

[Paulo Zanoni]

From: Paulo Zanoni <paulo.r.zanoni at intel.com>

... instead of PIPECONF_INTERLACE_MASK.

Signed-off-by: Paulo Zanoni <paulo.r.zanoni at intel.com>
---
 drivers/gpu/drm/i915/intel_display.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 066994f..4fbb296 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -1733,7 +1733,8 @@ static void lpt_enable_pch_transcoder(struct drm_i915_private *dev_priv,
 	pipeconf_val = I915_READ(PIPECONF(cpu_transcoder));
 
 	val &= ~TRANS_INTERLACE_MASK;
-	if ((pipeconf_val & PIPECONF_INTERLACE_MASK) == PIPECONF_INTERLACED_ILK)
+	if ((pipeconf_val & PIPECONF_INTERLACE_MASK_HSW) ==
+	    PIPECONF_INTERLACED_ILK)
 		val |= TRANS_INTERLACED;
 	else
 		val |= TRANS_PROGRESSIVE;
-- 
1.7.11.4