[Intel-gfx] [PATCH 1/3] drm/i915: extract gmbus_wait_hw_status
Daniel Vetter
daniel.vetter at ffwll.ch
Wed Sep 5 23:30:25 CEST 2012
On Wed, Sep 5, 2012 at 11:25 PM, Chris Wilson <chris at chris-wilson.co.uk> wrote:
> On Wed, 5 Sep 2012 21:24:39 +0200, Daniel Vetter <daniel.vetter at ffwll.ch> wrote:
>> The gmbus interrupt generation is rather fiddly: We can only ever
>> enable one interrupt source (but we always want to check for NAK
>> in addition to the real bit). And the bits in the gmbus status
>> register don't map at all to the bis in the irq register.
>>
>> To prepare for this mess, start by extracting the hw status wait
>> loop into it's own function, consolidate the NAK error handling a
>> bit. To keep things flexible, pass in the status bit we care about
>> (in addition to any NAK signalling).
>
> There are some subtle changes in that we introduce new error detection
> which is promptly ignored with a different wait period, but the changes
> look good.
Hm, I've tried to match the old code (at least where there are no
interrupts, i.e. gen2/3) as closely as possible. Hence the
schedule_timeout(1) instead of a simple wait_event_timeout. And the
error return values /should/ match what has been there before.
The only thing that changes is that I use 50ms for the timeout
everywhere - I don't see any reason why we should use something else.
So can you please elaborate for I don't really see the change in error
handling?
-Daniel
--
Daniel Vetter
daniel.vetter at ffwll.ch - +41 (0) 79 365 57 48 - http://blog.ffwll.ch
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