[Intel-gfx] [PATCH 2/3] drm/i915: wire up gmbus irq handler

Daniel Vetter daniel.vetter at ffwll.ch
Wed Sep 5 23:36:46 CEST 2012


On Wed, Sep 5, 2012 at 11:29 PM, Chris Wilson <chris at chris-wilson.co.uk> wrote:
> On Wed,  5 Sep 2012 21:24:40 +0200, Daniel Vetter <daniel.vetter at ffwll.ch> wrote:
>> Only enables the interrupt and puts a irq handler into place, doesn't
>> do anything yet.
>>
>> Unfortunately there's no gmbus interrupt support for gen2/3 (safe for
>> pnv, but there the irq is marked as "Test mode").
>
> The basics look good, but the paranoia says I'd like for the interrupt
> to only be enabled as required.

I do that ;-) The real interrupt generation is also controlled by
GMBUS4 - as long as that's 0, no interrupt shows up anywhere. And
frobbing GMBUS4 is much easier than adding a bunch of of spinlocks
around frobbing SDE_IIR ...
-Daniel
-- 
Daniel Vetter
daniel.vetter at ffwll.ch - +41 (0) 79 365 57 48 - http://blog.ffwll.ch



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