[Intel-gfx] [PATCH 4/8] drm/i915: simplify setting DSPCNTR inside ironlake_crtc_mode_set

Daniel Vetter daniel at ffwll.ch
Wed Sep 12 16:12:22 CEST 2012


On Wed, Sep 12, 2012 at 10:06:32AM -0300, Paulo Zanoni wrote:
> From: Paulo Zanoni <paulo.r.zanoni at intel.com>
> 
> Because declaring a variable in the beginning of the function, then
> initializing it 100 lines later, then using it 100 lines later does
> not make our code look good IMHO.
> 
> Signed-off-by: Paulo Zanoni <paulo.r.zanoni at intel.com>
Queued for -next, thanks for the patch. I've checked the gmch code and
there we have a few more bits (specifically pipe selection on gen2/3).
-Daniel
> ---
>  drivers/gpu/drm/i915/intel_display.c |    8 +++-----
>  1 file changed, 3 insertions(+), 5 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index 5a4e363..b657416 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -4748,7 +4748,7 @@ static int ironlake_crtc_mode_set(struct drm_crtc *crtc,
>  	int plane = intel_crtc->plane;
>  	int refclk, num_connectors = 0;
>  	intel_clock_t clock, reduced_clock;
> -	u32 dpll, fp = 0, fp2 = 0, dspcntr;
> +	u32 dpll, fp = 0, fp2 = 0;
>  	bool ok, has_reduced_clock = false, is_sdvo = false;
>  	bool is_crt = false, is_lvds = false, is_tv = false, is_dp = false;
>  	struct intel_encoder *encoder, *edp_encoder = NULL;
> @@ -4950,9 +4950,6 @@ static int ironlake_crtc_mode_set(struct drm_crtc *crtc,
>  	else
>  		dpll |= PLL_REF_INPUT_DREFCLK;
>  
> -	/* Set up the display plane register */
> -	dspcntr = DISPPLANE_GAMMA_ENABLE;
> -
>  	DRM_DEBUG_KMS("Mode for pipe %d:\n", pipe);
>  	drm_mode_debug_printmodeline(mode);
>  
> @@ -5029,7 +5026,8 @@ static int ironlake_crtc_mode_set(struct drm_crtc *crtc,
>  
>  	intel_wait_for_vblank(dev, pipe);
>  
> -	I915_WRITE(DSPCNTR(plane), dspcntr);
> +	/* Set up the display plane register */
> +	I915_WRITE(DSPCNTR(plane), DISPPLANE_GAMMA_ENABLE);
>  	POSTING_READ(DSPCNTR(plane));
>  
>  	ret = intel_pipe_set_base(crtc, x, y, fb);
> -- 
> 1.7.10.4
> 
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-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch



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