[Intel-gfx] [PATCH 2/3] drm/i915: correctly update crtc->x/y in set_base
Jesse Barnes
jbarnes at virtuousgeek.org
Wed Sep 12 17:29:21 CEST 2012
On Mon, 10 Sep 2012 21:58:30 +0200
Daniel Vetter <daniel.vetter at ffwll.ch> wrote:
> While reworking the modeset sequence, this got lost in
>
> commit 25c5b2665fe4cc5a93edd29b62e7c05c15dddd26
> Author: Daniel Vetter <daniel.vetter at ffwll.ch>
> Date: Sun Jul 8 22:08:04 2012 +0200
>
> drm/i915: implement new set_mode code flow
>
> I've noticed this because some Xorg versions seem to set up a new mode
> with every crtc at (0,0) and then pan to the right multi-monitor
> setup. And since some hacks of mine added more calls to mode_set using
> the stored crtc->x/y my multi-screen setup blew up.
>
> Signed-Off-by: Daniel Vetter <daniel.vetter at ffwll.ch>
> ---
> drivers/gpu/drm/i915/intel_display.c | 10 ++++++----
> 1 file changed, 6 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index b8e5a51..fcc7300 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -2195,6 +2195,8 @@ intel_pipe_set_base(struct drm_crtc *crtc, int x, int y,
>
> old_fb = crtc->fb;
> crtc->fb = fb;
> + crtc->x = x;
> + crtc->y = y;
>
> if (old_fb) {
> intel_wait_for_vblank(dev, intel_crtc->pipe);
> @@ -6993,11 +6995,11 @@ bool intel_set_mode(struct drm_crtc *crtc,
> dev_priv->display.crtc_disable(&intel_crtc->base);
> }
>
> - if (modeset_pipes) {
> + /* crtc->mode is already used by the ->mode_set callbacks, hence we need
> + * to set it here already despite that we pass it down the callchain.
> + */
> + if (modeset_pipes)
> crtc->mode = *mode;
> - crtc->x = x;
> - crtc->y = y;
> - }
>
> /* Only after disabling all output pipelines that will be changed can we
> * update the the output configuration. */
I had to check and make sure the full mode set path went down there
too...
Reviewed-by: Jesse Barnes <jbarnes at virtuousgeek.org>
--
Jesse Barnes, Intel Open Source Technology Center
More information about the Intel-gfx
mailing list