[Intel-gfx] [PATCH] drm/i915: rip out pre-production ilk cpu edp w/a

[Chris Wilson]

On Thu, 13 Sep 2012 13:13:29 +0200, Daniel Vetter <daniel.vetter at ffwll.ch> wrote:
> While reading docs I've noticed that this special workaround to select
> the 1.6 GHz DP clock only applies to pre-production ilk machines.
> Since the registers we're touching here are rather undocumented and
> might be harmful on later chips, rip it out.
> 
> For the Bspec reference of this w/a look in "vol4g CPU Display
> Registers [DevILK]", Section 4.1.7.1 "DP_A—DisplayPort A
> Control Register", "DP_PLL_Frequency_Select".
> 
> Signed-off-by: Daniel Vetter <daniel.vetter at ffwll.ch>

The spec definitely says DevILK-A, are we sure it got excised in
production machines? Once a w/a is implemented by the Windows driver
they have a tendency to linger...

So can you instead replace the w/a with a message to remind us
about the possibilty of failure of the PLL to change frequencies.
-Chris

-- 
Chris Wilson, Intel Open Source Technology Centre