[Intel-gfx] [PATCH 1/9] drm/i915: disable DOP clock gating on VLV and IVB

[Ben Widawsky]

On Wed, 19 Sep 2012 13:28:55 -0700
Jesse Barnes <jbarnes at virtuousgeek.org> wrote:

> References: https://bugs.freedesktop.org/show_bug.cgi?id=50233
> Signed-off-by: Jesse Barnes <jbarnes at virtuousgeek.org>
> ---
>  drivers/gpu/drm/i915/i915_reg.h |    1 +
>  drivers/gpu/drm/i915/intel_pm.c |    6 ++++--
>  2 files changed, 5 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_reg.h
> b/drivers/gpu/drm/i915/i915_reg.h index a828e90..b89e5f5 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -3443,6 +3443,7 @@
>  
>  #define GEN7_L3_CHICKEN_MODE_REGISTER		0xB030
>  #define  GEN7_WA_L3_CHICKEN_MODE
> 0x20000000 +#define
> GEN7_WA_DOP_CLOCK_GATING_DISABLE			0x08000000 
>  /* WaCatErrorRejectionIssue */
>  #define GEN7_SQ_CHICKEN_MBCUNIT_CONFIG		0x9030
> diff --git a/drivers/gpu/drm/i915/intel_pm.c
> b/drivers/gpu/drm/i915/intel_pm.c index 36c6409..7ec4b28 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -3541,7 +3541,8 @@ static void ivybridge_init_clock_gating(struct
> drm_device *dev) I915_WRITE(GEN7_L3CNTLREG1,
>  			GEN7_WA_FOR_GEN7_L3_CONTROL);
>  	I915_WRITE(GEN7_L3_CHICKEN_MODE_REGISTER,
> -			GEN7_WA_L3_CHICKEN_MODE);
> +		   GEN7_WA_L3_CHICKEN_MODE |
> +		   GEN7_WA_DOP_CLOCK_GATING_DISABLE);
>  
>  	/* According to the BSpec vol1g, bit 12 (RCPBUNIT) clock
>  	 * gating disable must be set.  Failure to set it results in
> @@ -3611,7 +3612,8 @@ static void valleyview_init_clock_gating(struct
> drm_device *dev) 
>  	/* WaApplyL3ControlAndL3ChickenMode requires those two on
> Ivy Bridge */ I915_WRITE(GEN7_L3CNTLREG1,
> GEN7_WA_FOR_GEN7_L3_CONTROL);
> -	I915_WRITE(GEN7_L3_CHICKEN_MODE_REGISTER,
> GEN7_WA_L3_CHICKEN_MODE);
> +	I915_WRITE(GEN7_L3_CHICKEN_MODE_REGISTER,
> GEN7_WA_L3_CHICKEN_MODE |
> +		   GEN7_WA_DOP_CLOCK_GATING_DISABLE);
>  
>  	/* This is required by WaCatErrorRejectionIssue */
>  	I915_WRITE(GEN7_SQ_CHICKEN_MBCUNIT_CONFIG,

As discussed on IRC, can you confirm the register I use in the L3
partity work isn't the right one. You can remove that disabling there
as well with this patch.

-- 
Ben Widawsky, Intel Open Source Technology Center