[Intel-gfx] [PATCH] drm/i915: Valleyview doesn't have rc6+ or rc6++

[Daniel Vetter]

On Thu, Sep 27, 2012 at 5:34 PM, Ben Widawsky <ben at bwidawsk.net> wrote:
> On Wed, 26 Sep 2012 14:06:36 +0200
> Daniel Vetter <daniel at ffwll.ch> wrote:
>
>> On Mon, Sep 17, 2012 at 05:10:15PM -0700, Ben Widawsky wrote:
>> > I do not currently have a VLV to test this on, but hopefully it only
>> > removes information from debugfs, sysfs, and prevents enabling an
>> > unsupported mode.
>> >
>> > CC: Jesse Barnes <jbarnes at virtuousgeek.org>
>> > Signed-off-by: Ben Widawsky <ben at bwidawsk.net>
>>
>> Haswell seems to have a similar issue ...
>> -Daniel
>
> I've not found such information. Can you tell me where you see that?

Haswell doesn't have the additional rc6 levels either, but on a quick
look through the code we still expose them, like on vlv.
-Daniel
-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch