[Intel-gfx] [ANNOUNCE] xf86-video-intel 2.21.6

[Chris Wilson]

Release 2.21.6 (2013-04-06)
===========================
A surprising highlight of this release is a little refresh to the KMS
support for OpenBSD. OpenBSD now has its own KMS implementation which is
mostly compatible with the interface in Linux, with one or two tweaks
supplied by Mark Kettenis. This release continues to cleanup behaviour
for Haswell.

 * Workaround a failure by the xserver to invalidate DRI buffers
   following a pixmap change for XComposite redirection.
   https://bugs.freedesktop.org/show_bug.cgi?id=62614

 * Fix computation of clip extents for stippling
   https://bugs.freedesktop.org/show_bug.cgi?id=62618

 * Support KMS on OpenBSD, by Mark Kettenis

 * Clean up sockets upon CloseScreen (making ourselves better behaved
   for muxed setups).

 * Fix the tests for AVX/AVX2 support in CPUID and remember to check for
   OS support as well.

 * Report a monotonic UST value for undisplayed drawables rather than 0
   by Daniel Kurtz

 * Fix video playback on gen4 through a complex clip (more gen4 GPU woes)
   https://bugs.launchpad.net/ubuntu/+source/xserver-xorg-video-intel/+bug/1162046


Complete list of changes since 2.21.5
-------------------------------------

Chris Wilson (32):
      sna/dri: Disable assertion and associated bookkeeping
      sna: Fix computation of clip extents for stippling
      sna: Add backlight control implementation
      sna: Fix assertions that the pixmap points into the CPU bo for fallbacks
      sna: Fix an assertion to check the correct bo
      sna: Convert out-of-bounds sample to CLEAR
      Remove the GeneralSocket upon CloseScreen
      sna: Trim removed fields from execbuffer2 for OpenBSD support
      sna: AVX2 is in the ebx result of cpuid
      sna/gen4+: Add a couple more advanced SSE variants for composite vertices
      sna: Fix AVX2 detection
      sna: Check for OS support of AVX/AVX2 before use
      sna/gen4+: Reorder code to compile on squeeze
      sna: Add extra '()' around bitwise &/&& for CPU feature detection
      sna/gen7: Use GT2 values for GT2 variants
      sna/gen7: Prefer spans for GT2 desktop variants
      sna/gen7: Restore render acceleration for VLV power-on board
      sna/gen7: Fix MOCS for Haswell
      sna/gen4+: Set read-write allocation mode for the target render cache
      sna/gen7: Resist the temptation to overprogram the number of PS threads for HSW
      sna/gen7: Refine is_gt2() for Haswell versus Ivybridge
      sna: Allow the compiler to inline memcpy for the bitblt routines
      sna: Try to eliminate pending operations to the bo being replaced
      DRI2GetMSC: Do not send a bogus ust for when the drawable is not displayed
      sna/gen4: Break the Video rendering loop into 16 rectangle chunks
      sna/gen4: Kill stray debugging ErrorF from previous commit
      sna: Relax scanline waits on HSW to be emittable from either ring
      sna: Adjust userptr structure for implicit padding
      sna: Restore bo->flush status for large bo
      sna: Improve assertions to detect rogue priv->cpu status
      configure: Allow valgrind support to be manually enabled
      2.21.6 release

Mark Kettenis (3):
      uxa: Add OpenBSD backlight control implementation
      sna: Fix OpenBSD backlight control implementation
      sna: Use a more portable way to determine total RAM size

git tag: 2.21.6

http://xorg.freedesktop.org/archive/individual/driver/xf86-video-intel-2.21.6.tar.bz2
MD5:  a4f002f50b370fe550231c9b33e12399  xf86-video-intel-2.21.6.tar.bz2
SHA1: 39bb2e6d1721393039047a3b7e0f7c0a3fa71202  xf86-video-intel-2.21.6.tar.bz2
SHA256: c3ef371e72544350c878d5373b2e7f49b8a0e253f9b63cb1ce2881180b45f8d9  xf86-video-intel-2.21.6.tar.bz2

http://xorg.freedesktop.org/archive/individual/driver/xf86-video-intel-2.21.6.tar.gz
MD5:  e9521894594ecd15d0607bbeb3e7f004  xf86-video-intel-2.21.6.tar.gz
SHA1: 70bcffdb3980586c93fc897c2a689363904bfed1  xf86-video-intel-2.21.6.tar.gz
SHA256: e4a45d13bd0e35e98b52a99a82e4106e50ff575b8ddf142007836f0da10fec4e  xf86-video-intel-2.21.6.tar.gz


-- 
Chris Wilson, Intel Open Source Technology Centre