[Intel-gfx] [PATCH i-g-t 1/3] tests/gem_fenced_exec_thrash: Increase MAX_FENCES to 32

Chris Wilson chris at chris-wilson.co.uk
Tue Apr 9 15:05:00 CEST 2013


On Tue, Apr 09, 2013 at 03:25:37PM +0300, ville.syrjala at linux.intel.com wrote:
> From: Ville Syrjälä <ville.syrjala at linux.intel.com>
> 
> IVB+ supports 32 fence registers, bump the maximum in the test.

Then again the test is only relevant for gen2/3 (and 1), and I don't
forsee the use of fences for GPU surface tiling being resurrected. On
the other hand, the test makes sure that future gpus ignore the old
restrictions.

One feature request for the test: feed in > max_fences expect
ENOSPC/EDEADLCK on gen2/3.
-Chris

-- 
Chris Wilson, Intel Open Source Technology Centre



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