[Intel-gfx] [PATCH 1/3] drm/i915: Add ECOBITS_SNB_BIT

[Daniel Vetter]

On Tue, Apr 09, 2013 at 07:23:18PM +0300, Imre Deak wrote:
> On Thu, 2013-04-04 at 15:13 +0300, ville.syrjala at linux.intel.com wrote:
> > From: Ville Syrjälä <ville.syrjala at linux.intel.com>
> > 
> > GAC_ECO_BITS has a bit similar to GAM_ECOCHK's ECOCHK_SNB_BIT. Add
> > the define, and enable it on SNB.
> > 
> > Signed-off-by: Ville Syrjälä <ville.syrjala at linux.intel.com>
> 
> On the series:
> Reviewed-by: Imre Deak <imre.deak at intel.com>

Queued for -next, thanks for the patches.
-Daniel
> 
> > ---
> >  drivers/gpu/drm/i915/i915_gem_gtt.c | 3 ++-
> >  drivers/gpu/drm/i915/i915_reg.h     | 1 +
> >  2 files changed, 3 insertions(+), 1 deletion(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
> > index 24a23b3..593137b 100644
> > --- a/drivers/gpu/drm/i915/i915_gem_gtt.c
> > +++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
> > @@ -312,7 +312,8 @@ void i915_gem_init_ppgtt(struct drm_device *dev)
> >  		uint32_t ecochk, gab_ctl, ecobits;
> >  
> >  		ecobits = I915_READ(GAC_ECO_BITS);
> > -		I915_WRITE(GAC_ECO_BITS, ecobits | ECOBITS_PPGTT_CACHE64B);
> > +		I915_WRITE(GAC_ECO_BITS, ecobits | ECOBITS_SNB_BIT |
> > +					 ECOBITS_PPGTT_CACHE64B);
> >  
> >  		gab_ctl = I915_READ(GAB_CTL);
> >  		I915_WRITE(GAB_CTL, gab_ctl | GAB_CTL_CONT_AFTER_PAGEFAULT);
> > diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> > index 058686c..4b8fd4d 100644
> > --- a/drivers/gpu/drm/i915/i915_reg.h
> > +++ b/drivers/gpu/drm/i915/i915_reg.h
> > @@ -127,6 +127,7 @@
> >  #define   ECOCHK_PPGTT_CACHE4B		(0x0<<3)
> >  
> >  #define GAC_ECO_BITS			0x14090
> > +#define   ECOBITS_SNB_BIT		(1<<13)
> >  #define   ECOBITS_PPGTT_CACHE64B	(3<<8)
> >  #define   ECOBITS_PPGTT_CACHE4B		(0<<8)
> >  
> 
> 
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-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch