[Intel-gfx] [PATCH 2/7] drm/i915: Fixup Oops in the pipe config computation

Daniel Vetter daniel at ffwll.ch
Thu Apr 11 23:09:00 CEST 2013


On Thu, Apr 11, 2013 at 04:29:05PM +0200, Daniel Vetter wrote:
> Yet again our current confusion between doing the modeset globally,
> but only having the new parameters for one crtc at a time.
> 
> This time things blew up when restoring modes in the switchless resume
> code - intel_modeset_affected_pipes figured out that pipe 2 should
> be restored, but since pipe 1 was disabled there was no mode nor fb
> when trying to restore the first crtc.
> 
> Hilarity ensued and broke resume on my i945gme machine since the
> pipe_config_set_bpp added in
> 
> commit 4e53c2e010e531b4a014692199e978482d471c7e
> Author: Daniel Vetter <daniel.vetter at ffwll.ch>
> Date:   Wed Mar 27 00:44:58 2013 +0100
> 
>     drm/i915: precompute pipe bpp before touching the hw
> 
> fell over the lack of an fb.
> 
> Fix this mess by now by justing shunting all the cool new global
> modeset logic in intel_modeset_affected_pipes.
> 
> Signed-off-by: Daniel Vetter <daniel.vetter at ffwll.ch>

Potentially the same bug reported against 3.8.1:

Bugzill: https://bugzilla.redhat.com/show_bug.cgi?id=917725
Cc: stable at vger.kernel.org
> ---
>  drivers/gpu/drm/i915/intel_display.c |    4 ++++
>  1 file changed, 4 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index f60493b..58c6bb6 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -7629,6 +7629,10 @@ intel_modeset_affected_pipes(struct drm_crtc *crtc, unsigned *modeset_pipes,
>  	/* ... and mask these out. */
>  	*modeset_pipes &= ~(*disable_pipes);
>  	*prepare_pipes &= ~(*disable_pipes);
> +
> +	/* HACK: We don't (yet) fully support global modesets. */
> +	*modeset_pipes &= 1 << intel_crtc->pipe;
> +	*prepare_pipes &= 1 << intel_crtc->pipe;
>  }
>  
>  static bool intel_crtc_in_use(struct drm_crtc *crtc)
> -- 
> 1.7.10.4
> 

-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch



More information about the Intel-gfx mailing list