[Intel-gfx] [PATCH 4/4] drm/i915: Use ILK+ style video sprites for Gen4.5

[ville.syrjala at linux.intel.com]

From: Ville Syrjälä <ville.syrjala at linux.intel.com>

According to the docs CTG and BLC have similar video sprites
as ILK/SNB.

This is what the docs say about video sprite features:
CTG and BLC have video sprites, and in addition CTG-B has YUV byte
order selection, live surface registers, and sprite scale registers.

I'm not sure how to translate that into real code. BLC I assume means
Bearlake-C, but I don't really know what it means for us. I'm thinking
that the PCI ID for BLC could be 8086:2982, aka. G35 and apparently
sometimes called Bearlake-G+. Looks like cureently we're treating it
like a 965 though, not a g4x.

Also I'm not sure where ELK fits. It's not explicitly mentioned in
most places, but when it is, it usually seems to match CTG features.
The machine I have here is 8086:2e22 which is ELK AFAICT, and my code
works on it, so apparently ELK also has video sprites, and they seem
happy to scale the content, and YUV byte order selection seems to work
as well.

There's kind of similar confusion about the frame counter registers
since the docs just say that CL uses the old style, CTG/ELK use the
new style. No mention of BW, BL or BLC here.

BLC is special in may places, in some places it matches BW/CL and
in some cases CTG.

For now I just chose to enable use the video sprite code paths when
IS_G4X() is true, and I've ignored the no-scale/no-YUV byte order
selection issues. Unfortunatly I don't have the hardware to verify
all the details.

Signed-off-by: Ville Syrjälä <ville.syrjala at linux.intel.com>
---
 drivers/gpu/drm/i915/intel_display.c | 4 ++--
 drivers/gpu/drm/i915/intel_sprite.c  | 6 +++---
 2 files changed, 5 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 4f3b490..9ed2b04 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -9056,7 +9056,7 @@ void intel_modeset_init(struct drm_device *dev)
 	for (i = 0; i < INTEL_INFO(dev)->num_pipes; i++) {
 		intel_crtc_init(dev, i);
 
-		if (INTEL_INFO(dev)->gen <= 4)
+		if (INTEL_INFO(dev)->gen <= 4 && !IS_G4X(dev))
 			continue;
 
 		for (j = 0; j < dev_priv->num_plane; j++) {
@@ -9087,7 +9087,7 @@ void intel_modeset_init(struct drm_device *dev)
 	}
 
 	/* two pipes and planes A+B+C */
-	if (INTEL_INFO(dev)->gen <= 4 &&
+	if (INTEL_INFO(dev)->gen <= 4 && !IS_G4X(dev) &&
 	    INTEL_INFO(dev)->num_pipes == 2) {
 		ret = intel_plane_init(dev, 0, PLANE_C);
 		if (ret)
diff --git a/drivers/gpu/drm/i915/intel_sprite.c b/drivers/gpu/drm/i915/intel_sprite.c
index 026e6b8..ae78942 100644
--- a/drivers/gpu/drm/i915/intel_sprite.c
+++ b/drivers/gpu/drm/i915/intel_sprite.c
@@ -862,7 +862,7 @@ intel_update_plane(struct drm_plane *plane, struct drm_crtc *crtc,
 		return -EINVAL;
 
 	/* Don't modify another pipe's plane */
-	if (INTEL_INFO(dev)->gen <= 4) {
+	if (INTEL_INFO(dev)->gen <= 4 && !IS_G4X(dev)) {
 		if (!gen2_check_pipe_sel(plane, pipe))
 			return -EINVAL;
 	} else {
@@ -1178,7 +1178,7 @@ intel_plane_init(struct drm_device *dev, enum pipe pipe, int plane)
 	case 4:
 	case 5:
 	case 6:
-		if (INTEL_INFO(dev)->gen <= 4) {
+		if (INTEL_INFO(dev)->gen <= 4 && !IS_G4X(dev)) {
 			intel_plane->can_scale = false;
 			intel_plane->max_downscale = 1;
 
@@ -1249,7 +1249,7 @@ intel_plane_init(struct drm_device *dev, enum pipe pipe, int plane)
 
 	intel_plane->pipe = pipe;
 	intel_plane->plane = plane;
-	if (INTEL_INFO(dev)->gen >= 5)
+	if (INTEL_INFO(dev)->gen >= 5 || IS_G4X(dev))
 		possible_crtcs = 1 << pipe;
 	else
 		possible_crtcs = (1 << INTEL_INFO(dev)->num_pipes) - 1;
-- 
1.8.1.5