[Intel-gfx] [PATCH 3/8] Port ready checks for vlv

[Daniel Vetter]

Since Paulo's hdmi/dp encoder rework we have the port number ready
at hand, so no need to do ugly hardcoding like that. Also, there's
the ->pre_enable hook right above waiting to be used.

Please encapsulate this into a vlv_check_dpll_port_ready(dev_priv, port)
or so and call it from hdmi/dp_pre_enable functions.
---
 drivers/gpu/drm/i915/intel_display.c |   17 +++++++++++++++++
 1 file changed, 17 insertions(+)

diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index c124dba..86c4b6d 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -3866,6 +3866,23 @@ static void i9xx_crtc_enable(struct drm_crtc *crtc)
 		if (encoder->pre_enable)
 			encoder->pre_enable(encoder);
 
+	if (IS_VALLEYVIEW(dev)) {
+		char port;
+
+		if (intel_pipe_has_type(crtc, INTEL_OUTPUT_HDMI) ||
+		    intel_pipe_has_type(crtc, INTEL_OUTPUT_DISPLAYPORT)) {
+			port_mask = DPLL_PORTB_READY_MASK;
+			port = 'B';
+		} else {
+			port_mask = DPLL_PORTC_READY_MASK; /* eDP on port C */
+			port = 'C';
+		}
+
+		if (wait_for((I915_READ(DPLL(0)) & port_mask) == 0, 1000))
+			WARN(1, "timed out waiting for port %c ready: 0x%08x\n",
+			     port, I915_READ(DPLL(0)));
+	}
+
 	intel_enable_pipe(dev_priv, pipe, false);
 	intel_enable_plane(dev_priv, plane, pipe);
 	if (IS_G4X(dev))
-- 
1.7.10.4