[Intel-gfx] [PATCH 5/7] drm/i915: clear FPGA_DBG_RM_NOCLAIM when capturing error state

[Damien Lespiau]

On Thu, Apr 18, 2013 at 04:35:44PM -0300, Paulo Zanoni wrote:
> From: Paulo Zanoni <paulo.r.zanoni at intel.com>
> 
> In the error state function we read the registers without checking if
> the power well is on, so after doing this we have to clear the
> FPGA_DBG_RM_NOCLAIM bit to prevent the next I915_WRITE from detecting
> it and printing an error message.
> 
> The first version of this patch was checking for the power well state
> and then avoiding reading registers that were off, but the reviewers
> requested to just read the registers any way and then later clear the
> FPGA_DBG_RM_NOCLAIM bit.
> 
> Signed-off-by: Paulo Zanoni <paulo.r.zanoni at intel.com>

Reviewed-by: Damien Lespiau <damien.lespiau at intel.com>

-- 
Damien