[Intel-gfx] [PATCH 00/15] high-bpp fixes and fdi auto dithering

Chris Wilson chris at chris-wilson.co.uk
Fri Apr 19 17:05:40 CEST 2013


On Fri, Apr 19, 2013 at 11:24:32AM +0200, Daniel Vetter wrote:
> Hi all,
> 
> This fixes all the bugs I've found in my various systems when using non-24bpp
> modes as the first part of the series.
> 
> And with working non-standard bpp support I've figured we can go fancy and
> implemented auto-dithering if we hit an fdi bw limit. Which means that you can
> now use 3-pipe pch configurations on ivb on pretty much everywhere. The only
> restriction is that you need to fire up pipe C first, since without atomic
> modeset pipe B will otherwise too much bw.
> 
> One big thing here is that this will break Paulo's hsw eDP machine, specifically
> the patch called "drm/i915: force bpp for eDP panels". But apparently without
> that my machine here is broken ... Ideas highly welcome about how we could quirk
> ourselves out of this mess.

Just tested (danvet/fdi-dither 93b459d0a80024041daea5195ff6f8a576fa89bc)
using depths 24 and 30 with Ironlake DP, still works.

Still has the wait_for_pipe_off WARN though.
-Chris

-- 
Chris Wilson, Intel Open Source Technology Centre



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