[Intel-gfx] [PATCH 6/8] gem_non_secure_batch.c:add bsd and blt ring test case

[Zhong Li]

Signed-off-by: Zhong Li <zhong.li at intel.com>
---
 tests/gem_non_secure_batch.c |   23 +++++++++++++++++++----
 1 file changed, 19 insertions(+), 4 deletions(-)

diff --git a/tests/gem_non_secure_batch.c b/tests/gem_non_secure_batch.c
index 9148b00..5d743c4 100644
--- a/tests/gem_non_secure_batch.c
+++ b/tests/gem_non_secure_batch.c
@@ -48,7 +48,7 @@ struct intel_batchbuffer *batch;
 /*
  * Testcase: Basic check of non-secure batches
  *
- * This test tries to stop the render ring with a MI_LOAD_REG command, which
+ * This test tries to stop the Render/BSD/BLT/VEBOX ring (if exist) with a MI_LOAD_REG command, which
  * should fail if the non-secure handling works correctly.
  */
 
@@ -57,7 +57,7 @@ struct intel_batchbuffer *batch;
 static int num_rings = 1;
 
 static void
-mi_lri_loop(void)
+mi_lri_loop(unsigned int ring_buffer_addr)
 {
 	int i;
 
@@ -68,7 +68,7 @@ mi_lri_loop(void)
 
 		BEGIN_BATCH(4);
 		OUT_BATCH(MI_LOAD_REGISTER_IMM | 1);
-		OUT_BATCH(0x203c); /* RENDER RING CTL */
+		OUT_BATCH(ring_buffer_addr); /*RING CTL */
 		OUT_BATCH(0); /* try to stop the ring */
 		OUT_BATCH(MI_NOOP);
 		ADVANCE_BATCH();
@@ -96,6 +96,8 @@ int main(int argc, char **argv)
 	if (HAS_BLT_RING(devid))
 		num_rings++;
 
+	if (HAS_VEBOX_RING(devid))
+		num_rings++;
 
 	printf("num rings detected: %i\n", num_rings);
 
@@ -112,7 +114,20 @@ int main(int argc, char **argv)
 		exit(-1);
 	}
 
-	mi_lri_loop();
+	printf("try to stop render ring\n");
+	mi_lri_loop(0x203c);
+
+	if (HAS_BSD_RING(devid)){
+		printf("try to stop bsd ring\n");
+		mi_lri_loop(0x1203C);
+	}
+
+	if (HAS_BLT_RING(devid)){
+		printf("try to stop blt ring\n");
+		mi_lri_loop(0x2203C);
+	}
+
+
 	gem_quiescent_gpu(fd);
 
 	intel_batchbuffer_free(batch);
-- 
1.7.9.5