[Intel-gfx] [PATCH 1/7] drm/i915: consolidate pch pll computations a bit

[Ville Syrjälä]

On Fri, Apr 19, 2013 at 11:14:31AM +0200, Daniel Vetter wrote:
> We need the dpll/fp/fp2 values only when we need a pch pll. So move
> them together with the code to acquire such a pll.
> 
> Signed-off-by: Daniel Vetter <daniel.vetter at ffwll.ch>

Reviewed-by: Ville Syrjälä <ville.syrjala at linux.intel.com>

> ---
>  drivers/gpu/drm/i915/intel_display.c | 19 ++++++++++---------
>  1 file changed, 10 insertions(+), 9 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index 3c90605..ca2433b 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -5716,7 +5716,7 @@ static int ironlake_crtc_mode_set(struct drm_crtc *crtc,
>  	int plane = intel_crtc->plane;
>  	int num_connectors = 0;
>  	intel_clock_t clock, reduced_clock;
> -	u32 dpll, fp = 0, fp2 = 0;
> +	u32 dpll = 0, fp = 0, fp2 = 0;
>  	bool ok, has_reduced_clock = false;
>  	bool is_lvds = false;
>  	struct intel_encoder *encoder;
> @@ -5761,14 +5761,6 @@ static int ironlake_crtc_mode_set(struct drm_crtc *crtc,
>  	if (is_lvds && dev_priv->lvds_dither)
>  		dither = true;
>  
> -	fp = clock.n << 16 | clock.m1 << 8 | clock.m2;
> -	if (has_reduced_clock)
> -		fp2 = reduced_clock.n << 16 | reduced_clock.m1 << 8 |
> -			reduced_clock.m2;
> -
> -	dpll = ironlake_compute_dpll(intel_crtc, &clock, &fp, &reduced_clock,
> -				     has_reduced_clock ? &fp2 : NULL);
> -
>  	DRM_DEBUG_KMS("Mode for pipe %c:\n", pipe_name(pipe));
>  	drm_mode_debug_printmodeline(mode);
>  
> @@ -5776,6 +5768,15 @@ static int ironlake_crtc_mode_set(struct drm_crtc *crtc,
>  	if (intel_crtc->config.has_pch_encoder) {
>  		struct intel_pch_pll *pll;
>  
> +		fp = clock.n << 16 | clock.m1 << 8 | clock.m2;
> +		if (has_reduced_clock)
> +			fp2 = reduced_clock.n << 16 | reduced_clock.m1 << 8 |
> +				reduced_clock.m2;
> +
> +		dpll = ironlake_compute_dpll(intel_crtc, &clock,
> +					     &fp, &reduced_clock,
> +					     has_reduced_clock ? &fp2 : NULL);
> +
>  		pll = intel_get_pch_pll(intel_crtc, dpll, fp);
>  		if (pll == NULL) {
>  			DRM_DEBUG_DRIVER("failed to find PLL for pipe %c\n",
> -- 
> 1.7.11.7
> 
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-- 
Ville Syrjälä
Intel OTC